Description

Features

High-Performance Modified RISC CPU:

• It has Modified Harvard Architecture
• 84 base directions with flexible tending to modes
• C compiler optimized instruction set of design
• 27 intersect sources
• 3 external interrupt sources
• 24-bit wide guidelines, 16-bit wide data way
• 16 x 16-bit working register cluster
• Up to 30 MIPs task:
  • DC to 40 MHz outer clock input
  • 4 MHz-10 MHz oscillator contribution with PLL active (4x, 8x, 16x)
• Peripheral and External interface with sources
• 8 user selectable need levels for each hinder
• 4 processor exemptions and programming traps
• Primary and Alternate interface with Vector Tables

DSP Engine Features

• Modulo and Bit-Reversed Addressing modes

• • • Two, 40-bit wide aggregators with discretionary saturation logic
    • 17-bit x 17-bit single cycle equipment fragmentary/whole number multiplier

• Single cycle Multiply-Accumulate (MAC) task
• Dual information fetch
• 40-organize Barrel Shifter

Peripheral Features:

• High current source/sink I/O pins: 25 mA/25 mA
• Optionally combine up 16-bit timers into 32-bit clock modules
• 3-wire SPI™ modules (underpins 4 Frame modes)
• I2C™ module bolsters Multi-Master/Slave mode and 7-bit/10-bit addressing
• There addressable UART modules with FIFO buffers

Motor Control PWM Module Features:

• Complementary or Independent Output modes
• Edge and Center Aligned modes
• Multiple obligation cycle generators
• Dedicated time base with 4 modes
• Programmable yield polarity
• Dead time control for Complementary mode
• Manual yield control
• Trigger for synchronized A/D transformations

Quadrature Encoder Interface Module Features:

• Phase A, Phase B and Index Pulse input
• 16-bit up/down position counter
• Count bearing status
• Position Measurement (x2 and x4) mode
• Programmable digital noise filters on contributions (inputs)
• Alternate 16-bit Timer/Counter mode
• Interrupt on position counter rollover

Analog Features:

• 10-bit 1 Msps Analog-to-Digital Converter (A/D)
• A/D Conversion accessible amid Sleep and Idle
• 4 Sample/Hold Channels
• Multiple Conversion Sequencing Options

Special Microcontroller Features:

• Improved Flash program memory:
  • 10,000 delete/write cycle (min.) for industrial temperature range, 100K (typical)
• Data EEPROM memory:
  • 100,000 delete/write cycle (min.) for industrial temperature range, 1M (typical)
• Self-re programmable under software control
• Power up Timer (PWRT), Power on Reset (POR) and Oscillator Start-up Timer (OST)
• Flexible Watchdog Timer (WDT) with on-chip low power RC oscillator is used for reliable operation
• Fail-Safe clock screen / monitor task
• Detects clock catastrophe and switches to on-chip low power RC oscillator
• Programmable code assurance
• In-Circuit Serial Programming™ (ICSP™)
• Programmable Brown-out Detection and Reset generation
• Selectable Power Management modes
  • Idle, sleep and Alternate Clock modes

CMOS Technology:

• High speed Flash machinery with low power
• Wide operating voltage range (2.5V to 5.5V)
• Industrial and Extended temperature ranges
• Low power utilization